Staff Verification Engineer, Compute Subsystems
Markham, ONQualcomm Canada ULC
5+ ansCandidates need a bachelor's, master's, or PhD in engineering or science with several years of ASIC design or verification experience, plus strong UVM and SystemVerilog skills, bus protocol knowledge, and scripting in Perl or Python.
UVM, Perl, Python, C
FY27 Intern - Edge AI and Display Hardware Architecture Development Engineering Internship - Canada (16 months)
Markham, ONQualcomm Canada ULC
Qualcomm Canada ULC needs candidates enrolled in an engineering or computer science bachelor's program, available May/June 2027 to August/September 2028 and graduating November 2028 or later. Strong analytical skills, programming in C/C++ or Python, and HW modeling and simulation experience are required.
Verilog, VHDL, C/C++, Python, HW simulation tools, HW CAD tools
SOC Design Engineer
Markham, ON +2Qualcomm Canada ULC
4+ ansCandidates need a degree in science or engineering and 4+ years of ASIC design, verification or integration work, with strong digital front-end design skills in Verilog, SystemVerilog and VHDL. Experience with power domains, clock domain crossing, low-power design and chip design tools is needed.
Spyglass, Design Compiler, Cadence LEC, Perl, TCL