Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university bachelor's program in electrical or computer engineering or a related field. Knowledge of semiconductor devices, digital logic, VLSI, Verilog or VHDL, scripting, and Linux/Unix is strongly encouraged.
Verilog, VHDL, Perl, TCL, Linux, UNIX
Summer 2027 Long Term Hardware Design Engineering Intern/Co-Op
Vancouver, BCAMD, Inc.
Candidates need to be enrolled in a Canada based university bachelor's program in electrical or computer engineering or a related field. Knowledge of Verilog or VHDL, ASIC design, physical design and Linux/Unix is an asset, and valid work authorization is required.
Verilog, VHDL, Perl, TCL, UNIX, Linux
Short Term 2027 Data Analyst Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university undergraduate program in a data or engineering field. Experience with Python, SQL, R, Java, data processing, cloud services and visualization tools is strongly encouraged.
Power BI, Snowflake, Oracle, SQL Server, Microsoft Azure, Kubernetes
Short Term 2027 Hardware Design Engineering Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Canadian university bachelor's program in electrical or computer engineering or a related field. Knowledge of Verilog or VHDL, digital logic, VLSI, ASIC design and scripting or Linux environments is an asset. Valid work authorization is required.
Verilog, VHDL, Perl, TCL, Ruby, C
Summer 2027 Long Term Analog and Mixed Signal Engineering Intern/Co-Op
Markham, ONAMD, Inc.
Candidates need to be enrolled in a Bachelor's program in Electrical or Computer Engineering at a Canadian university. They need interest or exposure to analog, mixed-signal or IC design, basic electronics knowledge, programming or scripting skills and lab instrument experience.
EDA/CAD tools, oscilloscope, network analyzer, spectrum analyzer, function generator
SoC DFX Scan / ATPG Engineer
Markham, ONAMD, Inc.
Candidates need a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, plus strong DFT fundamentals and ASIC design flow knowledge. Scripting in Python, Perl, Tcl, or Shell and Verilog/SystemVerilog familiarity are preferred.
Verilog, SystemVerilog, Python, Perl, Tcl
SoC Physical Design Implementation Lead
Markham, ONAMD, Inc.
Candidates need deep hands-on experience with place and route, static timing analysis, clock distribution and physical verification on large SoCs. Advanced process nodes, 3D stacking, and Synopsys, Cadence or Siemens CAD tools are preferred, along with Tcl, Perl or Shell scripting.
Synopsys tools, Cadence tools, Tcl, Perl, Shell
3D IC and ADVANCED PACKAGING CAD ENGINEER
Markham, ONAMD, Inc.
Candidates need a computer or electrical engineering degree, experience in 3D-IC and advanced packaging, and hands-on work with Synopsys or Cadence EDA tools. Strong Python, TCL and Perl scripting on Linux, plus experience applying AI or LLMs to CAD or hardware design, are preferred.
Synopsys 3DIC Compiler, Synopsys EDA tools, Cadence EDA tools, Verilog, UPF, Python
DFT Design Engineer
Markham, ONAMD, Inc.
Candidates need a Bachelor's or Master's in computer or electrical engineering, strong scripting skills in Perl, Python, TCL or C++, knowledge of digital circuits and VLSI, and good communication skills.
Perl, Python, TCL, C++, SQL
SoC DFX Scan / ATPG Engineer
Ottawa, ONAMD, Inc.
Candidates need a Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or a related field, plus strong DFT fundamentals and ASIC design flow knowledge. Scripting in Python, Perl, Tcl, or Shell and Verilog/SystemVerilog familiarity are preferred.
Verilog, SystemVerilog, Python, Perl, Tcl
Lead Physical Design Engineer, Place & Route
Markham, ONAMD, Inc.
Candidates need deep place-and-route and physical design experience on complex, advanced-node chips, plus scripting skills in TCL, Perl or Shell. A bachelor's or master's degree in electrical, computer or a related engineering field is preferred.
Synopsys Fusion Compiler, Cadence, Siemens EDA, TCL, Perl, Shell
SoC Lead Engineer – LEC & Low Power Signoff
Markham, ONAMD, Inc.
Candidates need proven SoC implementation and tapeout experience, in-depth LEC and low power static verification skills, and hands-on use of Formality or Conformal, VC-LP or CLP, and Design Compiler or Fusion Compiler. Verilog, VHDL, UPF, Tcl, Perl and Python skills and a BS/MS in electrical engineering or a related field are also expected.
Synopsys Formality, Cadence Conformal, Synopsys VC-LP, Cadence Conformal Low Power, Design Compiler, Fusion Compiler
Senior ASIC RTL Design Engineer, AI Networking IP
Ottawa, ONAMD, Inc.
Candidates need proven RTL design experience in Verilog or SystemVerilog, ASIC or FPGA delivery experience, and a bachelor's or master's degree in computer or electrical engineering. Networking or high-speed interface knowledge, such as Ethernet or PCIe, is preferred.
Verilog, SystemVerilog, Synopsys tools, Cadence tools, Siemens (Mentor) tools, Python
Principal ASIC Design Engineer
Markham, ONAMD, Inc.
Candidates need a track record of leading ASIC or silicon designs through multiple product tape-outs, plus deep RTL and microarchitecture experience. Strong communication skills and the ability to lead technical reviews are also required.
Verilog, SystemVerilog, Python, Perl, Tcl