SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
7+ ansQualcomm needs a candidate with 7+ years of silicon validation or platform bring-up experience and deep knowledge of NoCs, AXI, memory hierarchy, power modes and debug. A degree in engineering or computer science is required, with embedded C/C++, Python and assembly skills.
JTAG debugger, Perfmon, kernel debugger, emulation platform
SoC Clock & Power Management Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
5+ ansQualcomm Technologies needs candidates with a bachelor's degree in engineering and 5+ years in SoC validation or related areas. They must know clock or power validation, C and Python, lab instruments such as oscilloscopes, and JTAG debug on ARM-based SoCs.
Oscilloscope, Logic analyzer, Multimeter, Python, C, Perl
System Validation Lead, Staff (AI Accelerator Platform)
Markham, ONQualcomm Technologies, Inc.
8+ ansCandidates need 8+ years of silicon validation or platform bring-up experience, strong C and Assembly skills, and bare-metal embedded knowledge. A BS, MS or PhD in an engineering or computer science field is required, plus the minimum years of ASIC work listed for each degree.
FPGA, Verilog, VHDL, Python, Linux shell, development boards
SoC Debug Engineer, Senior Staff
Markham, ONQualcomm Technologies, Inc.
9+ ansCandidates need 9+ years of pre-silicon and post-silicon bring-up and debug experience, RTL understanding, and hands-on use of JTAG and lab equipment such as logic analyzers and oscilloscopes. A Master's in Computer or Electrical Engineering is required, along with the stated years of ASIC design or validation experience.
JTAG, Logic analyzer, Signal generator
SoC Debug Engineer, Staff
Markham, ONQualcomm Technologies, Inc.
6+ ansCandidates need 6+ years of pre-silicon and post-silicon bring-up and failure analysis experience, plus RTL understanding and JTAG and lab equipment skills. A Master's in Computer or Electrical Engineering is required, along with ASIC experience.
JTAG, Logic analyzer, Signal generator
SoC Infrastructure/NoC, Power & Performance Validation Engineer
Markham, ONQualcomm Technologies, Inc.
5+ ansCandidates need several years of ASIC design, validation or verification experience, with a strong grasp of on-chip interconnects, performance and power. Strong programming in C, C++, Python and assembly, plus JTAG and kernel debugging, are expected.
JTAG debuggers, kernel debuggers, state dump scripts, Python, C, C++