Emplois “DDR” au Canada

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• 10j

  DDR Validation Lead, Staff (AI Accelerator Platform)

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  5+ ansCandidates need at least 5 years in DDR or memory subsystem validation or silicon bring-up, plus knowledge of LPDDR architectures, memory controllers and PHYs, and strong post-silicon debug skills. Qualcomm also requires a bachelor's, master's or PhD and C/C++ proficiency.

  emulation platforms, FPGA, C, C++

  10j

  PST Validation Engineer

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  2+ ansCandidates need a bachelor's degree in science or engineering and 2+ years of ASIC design, verification or validation work, or a master's with 1+ year. They need knowledge of mobile chip architecture, regression and PVT testing, and C and Python programming.

  Lauterbach Trace32, JTAG, Python, C

  10j

  Emulation Performance/Debug Engineer

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  2+ ansCandidates need a bachelor's degree in science or engineering with 2+ years of ASIC work, or a master's with 1+ year. Experience with emulation platforms, Verilog/SystemVerilog, C, Python, TCL and FPGA timing closure is preferred.

  Veloce, Palladium, Xilinx FPGA, Intel FPGA, JTAG, Python

  10j

  Pre-Silicon Validation Engineer

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  Candidates need a Bachelor's or Master's degree in an engineering, computer science or related field, 0-2+ years in ASIC verification, FPGA prototyping or hardware emulation, and strong skills in SystemVerilog, C/C++, Linux, and Python. Experience with RTL debugging and SoC architectures is also required.

  SystemVerilog, C/C++, Python, Linux, Cadence Palladium, Siemens Veloce

  10j

  SoC Infrastructure/NoC, Power & Performance Validation Lead, Staff (AI Accelerator Platform)

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  7+ ansQualcomm needs a candidate with 7+ years of silicon validation or platform bring-up experience and deep knowledge of NoCs, AXI, memory hierarchy, power modes and debug. A degree in engineering or computer science is required, with embedded C/C++, Python and assembly skills.

  JTAG debugger, Perfmon, kernel debugger, emulation platform

  10j

  SoC Infrastructure/NoC, Power & Performance Validation Engineer

  Markham, ON

  Sur place

  QT

  Qualcomm Technologies, Inc.

  5+ ansCandidates need several years of ASIC design, validation or verification experience, with a strong grasp of on-chip interconnects, performance and power. Strong programming in C, C++, Python and assembly, plus JTAG and kernel debugging, are expected.

  JTAG debuggers, kernel debuggers, state dump scripts, Python, C, C++

• 9j

  Automotive Infotainment and ADAS Hardware Applications Engineer

  Markham, ON

  Sur place

  

  Qualcomm Canada ULC

  4+ ansCandidates need a bachelor's degree in electrical or computer engineering with 4+ years of hardware applications or design experience, or an advanced degree with less experience. Strong knowledge of high-speed board design, PDN and SI/PI, and excellent communication and leadership skills are preferred.

  oscilloscope, logic analyzer

  9j

  Application Engineer, Sr Staff

  Toronto, ON

  Sur place

  

  Qualcomm Canada ULC

  6+ ansCandidates need a bachelor's degree in electrical or computer engineering plus 6 or more years of hardware experience, or an equivalent advanced degree with fewer years. They need strong debugging skills, C/C++ for embedded systems, and Python for test automation.

  Oscilloscope, BERT, Protocol analyzer

• 11j

  Senior Manager, Lifecycle Management & Reliability

  Ottawa, ON

  154k–253k $/anTemps plein

  CC

  Ciena Canada ULC

  10+ ans3+ gestionCandidates need a bachelor's degree in an engineering discipline and 10+ years of hardware engineering experience in telecom, networking or optical systems, including 3+ years leading teams. They must have strong skills in reliability, qualification, failure analysis and cross-functional leadership.

  Agile PLM, Jira, Confluence

• 12j

  Lead Emulation Test Engineer

  Télétravail au Canada

  TélétravailTemps plein

  

  Positron AI

  8+ ansCandidates need 8+ years in ASIC emulation or verification, including large Palladium installations, and a BS or MS in electrical engineering, computer engineering or computer science. Strong skills in SystemVerilog, Verilog, C/C++, Python, Tcl and Bash are required, along with knowledge of PCIe, DDR and AXI protocols.

  Cadence Palladium, Verdi, SimVision

• 12j

  Hardware Engineering, Staff Engineer- 19028

  Nepean, ON

  S

  Synopsys

  Candidates need proven experience with high-speed interface signaling, signal and power integrity analysis, and EDA tools such as HFSS, Ansys, HSPICE, Raptor and ADS. They also need strong communication skills and board-level and on-chip IO design knowledge.

  HFSS, Ansys, HSPICE, Raptor, ADS

  19j

  Principal Analog Design Engineer-19318

  Markham, ON

  S

  Synopsys

  6+ ansCandidates need a PhD with 6+ years or a Master's with 8+ years of analog and mixed-signal IC design experience, including FinFET circuit design. Strong transistor-level CMOS and SPICE simulation skills are required.

  Spectre, HSPICE, Verilog-A, schematic entry tools, Python, Perl

• 14j

  Directeur ou directrice de comptes principal(e) – Secteur public

  Ottawa, ON

  Temps plein

  

  Nakisa FR

  8+ ans8 ans ou plus d’expérience en vente de logiciels d’entreprise ou SaaS; Historique de transactions complexes dans des environnements réglementés; Connaissance pratique de l’approvisionnement public fédéral

  Dynamics 365, HubSpot, LinkedIn Sales Navigator, Apollo

• 15j

  Staff SoC Design Engineer

  Télétravail au Canada

  TélétravailTemps plein

  

  quadric

  5+ ansCandidates need a BS, MS or PhD in electrical or computer engineering, at least 5 years of SoC or ASIC front-end design, and fluency in SystemVerilog or Verilog. Strong computer architecture and low-power design skills are required.

  SystemVerilog, Verilog, VCS, NoC, PCIe, UCIe

• 18j

  IP Design PEY Intern

  Toronto, ON

  Temps plein

  AS

  Altera Semiconductor Technology Canada ULC

  Candidates need to be currently pursuing a BS in Computer Engineering, Engineering Science, Electrical Engineering, Computer Science or a related field. They need at least 3 months of Verilog, SystemVerilog or VHDL design or verification experience and 3 months of Python, TCL, Perl, C or C++ experience.

  Quartus Prime, Verilog, SystemVerilog, VHDL

• 18j

  Quality Assurance Lead, Nuclear

  Cambridge, ON

  110k–120k $/an

  

  Eclipse Automation

  3+ ans3+ gestionCandidates need a post-secondary diploma or degree in engineering, manufacturing, quality or a related technical field, and 3 to 5 years of QA/QC leadership in the nuclear industry. They need strong knowledge of ISO 9001:2015 and CSA N299, and skills in analysis, problem-solving and communication. An ASQ CQE or CQT is an asset.

  ITP, NCR, SCAR, DDR

• 20j

  Hardware Designer

  Télétravail au Canada

  95k–145k $/anTélétravailTemps plein

  

  Fidus Systems: Founded in 2001, Fidus Systems is a premier electronic system design and development company with specialized expertise in FPGA design, embedded…

  5+ ansCandidates need at least 5 years of electronics design experience and a degree in electrical or computer engineering. Strong knowledge of high-speed circuits, multi-layer PCB design and high-speed protocols such as PCIe, DDR4 and USB-C is required.

  OrCAD Capture CIS, Cadence Allegro, LTSpice, oscilloscope, VNA, signal generator

• 22j

  Sr FPGA Programmer - Test et Vérification DO-254

  Montréal, QC

  Temps plein

  

  Thales

  10+ ansDiplôme d'ingénieur ou Master 2 / Doctorat, 5 à 10 ans d'expérience en vérification; Maîtrise de VHDL et UVM; Expérience avec Questa ou ModelSim et outils Aldec

  Questa, ModelSim, Aldec Active-HDL, Git, DOORS, Polarion

• 22j

  Sr FPGA Programmer - Test et Vérification DO-254

  Montréal, QC

  HybrideTemps plein

  TC

  Thales Canada Inc., Avionics

  10+ ansDiplôme d'ingénieur ou Bac+5 avec 5 à 10 ans d'expérience en vérification; Maîtrise de VHDL et UVM, simulation avec Questa ou ModelSim; Connaissance approfondie de DO-254 et des métriques de code coverage

  Questa, ModelSim, Aldec Active-HDL, Git, DOORS, Polarion

  22j

  Sr FPGA Programmer - Test et Vérification DO-254

  Montréal, QC

  HybrideTemps plein

  TC

  Thales Canada Inc., Avionics

  10+ ansDiplôme d'ingénieur ou Bac+5 avec 5 à 10 ans d'expérience en vérification; Maîtrise de VHDL et UVM, simulation avec Questa ou ModelSim; Connaissance approfondie de DO-254 et des métriques de code coverage

  Questa, ModelSim, Aldec Active-HDL, Git, DOORS, Polarion

• 22j

  ASIC Verification Intern - Summer 2027

  Toronto, ON

  Temps plein

  NC

  NVIDIA Canada Dev. Inc.

  Candidates need to be pursuing a BS or MS in Electrical or Computer Engineering. They need working knowledge of computer architecture, logic design, verification, algorithms and data structures, plus strong first-principles debugging and teamwork skills.

  Verilog, SystemVerilog, UVM, FPGA, Linux, Windows

• 25j

  RQ08956 - UX Designer - Senior

  Toronto, ON

  RP

  Rubicon Path

  Candidates need senior UX and service design experience, including user research, journey mapping, prototyping and stakeholder work. Prior DDR project experience is a must-have, and experience leading project teams is expected.

  Design and prototyping tools

  25j

  RQ08863 - Software Developer - Full Stack - Senior

  Toronto, ON

  RP

  Rubicon Path

  10+ ansCandidates need 10+ years of J2EE, IBM WebSphere portal and Spring experience, plus React and database skills. Prior work on ServiceOntario portal services and accessibility standards such as AODA and WCAG 2.0 is required.

  RSA, Eclipse, IBM WebSphere Portal, IBM WebSphere Application Server, IBM Urban Code, Oracle

  25j

  RQ08955 - UI Designer - Senior

  Toronto, ON

  RP

  Rubicon Path

  Candidates need strong Figma skills, knowledge of WCAG 2.0 and ARIA accessibility, and experience with digital product design and agile delivery. Prior work on a Digital Dealer Registration project is a must-have.

  Figma, Jira, DevOps

14 entreprises