Staff CPU/NPU Architecture RTL Design Engineer
Markham, ONSur place
Qualcomm Canada ULC
2+ ansCandidates need a bachelor's, master's or PhD in a related field, with 4+, 3+ or 2+ years of ASIC design experience respectively. They also need knowledge of CPU or AI processor micro-architecture, RTL design and power management.
RTL, Scheduling, Recruitment